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求 MT07P 机芯 TCL D43A710 程序

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发表于: 2019-8-26 17:44:28
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本帖最后由 辛集腾龙电脑 于 2019-8-30 12:01 编辑

开机指示灯亮 不显示 求程序 在线ISP读用户区 失败
打印口信息:
Boot-
DRAM Channel A Calibration.
1T = (78 - 17) = 61 delay cells
Clock frequency = 798 MHz, Clock period = 1253 ps, 1 delay cell =20 ps
Byte 0 : Gating(-30 ~ 30), Size=61 .
Byte 1 : Gating(-30 ~ 30), Size=61 .
Byte 2 : Gating(-29 ~ 30), Size=60 .
Byte 3 : Gating(-29 ~ 30), Size=60 .
HW Byte 0 : DQS(-9 ~ 14), Size 24 , Set 3.
HW Byte 1 : DQS(-12 ~ 12), Size 25 , Set 0.
HW Byte 2 : DQS(-9 ~ 12), Size 22 , Set 2.
HW Byte 3 : DQS(-11 ~ 13), Size 25 , Set 1.
DATLAT calibration
first_step= 11 total pass= 5 best_step=12 .
TX HW Byte 0 : DQS(2 ~ 26), Size 25, Set 14.
TX HW Byte 1 : DQS(3 ~ 27), Size 25, Set 15.
TX HW Byte 2 : DQS(2 ~ 23), Size 22, Set 13.
TX HW Byte 3 : DQS(2 ~ 25), Size 24, Set 14.
DRAM A Size = 768 Mbytes.
BootStart Pmain0x0000a000
EMMC boot
CID:0xb81762e7
:0x30029155
:0x30344745
:0x11010030
LZHS addr:0x00100040
LZHS size:0x0015c650
LZHS checksum:0x000000d4
LZHS size:0x0015c650
----------------------以上是偶尔会出的的打印信息--------------------
*******************************下边是大部分的情况下 开机显示的打印信息***********
Boot-
DRAM Channel A Calibration.
1T = (78 - 16) = 62 delay cells
Clock frequency = 798 MHz, Clock period = 1253 ps, 1 delay cell =20 ps
Byte 0 : Gating(-31 ~ 31), Size=63 .
Byte 1 : Gating(-31 ~ 31), Size=63 .
Byte 2 : Gating(-31 ~ 31), Size=63 .
Byte 3 : Gating(-30 ~ 31), Size=62 .
HW Byte 0 : DQS(-9 ~ 14), Size 24 , Set 3.
HW Byte 1 : DQS(-12 ~ 12), Size 25 , Set 0.
HW Byte 2 : DQS(-9 ~ 12), Size 22 , Set 2.
HW Byte 3 : DQS(-11 ~ 13), Size 25 , Set 1.
DATLAT calibration
first_step= 11 total pass= 5 best_step=12 .
TX HW Byte 0 : DQS(2 ~ 26), Size 25, Set 14.
TX HW Byte 1 : DQS(3 ~ 27), Size 25, Set 15.
TX HW Byte 2 : DQS(2 ~ 23), Size 22, Set 13.
TX HW Byte 3 : DQS(2 ~ 25), Size 24, Set 14.
DRAM A Size = 768 Mbytes.
BootStart Pmain0x0000a000
EMMC boot
CID:0xb81762e7
:0x30029155
:0x30344745
:0x11010030
LZHS addr:0x00100040
LZHS size:0x0015c650
LZHS checksum:0x000000d4
LZHS size:0x0015c650
store RSA & AES keys in DMX SRAM
LZHS begin
BootStart Lmain
MT5882 Boot Loader v0.9
Boot reason: A/C power on!!read from eeprom ioff 0 phy_off 3ee0
SIF_Master0: V2 design
IR DATA register : 0x       0
Boot reason: A/C power on!!T8032 init A/C on case loader stage...
Load T8032 FW (addr: 0x  e31850, size: 23142)success!!
T8032 FW version: 6
T8032 change to loader stage...
LDR_FlashCopy 0xf010 0x62b00 0x80
11010030:30344745:30029155:11010030
id1:00303034 id2:47453002
eMMC Name: THGBMBG5D1KBAIL
Support network!1st MAC in EEP is valid (5c:36:b8:c3:1b:d4)
1st : (5c:36:b8:c3:1b:d4)
2nd : (ff:ff:ff:ff:ff:ff)
@@@@@@@@@epp_usbupgrade_flag[0x30]
Boot reason: A/C power on!!Boot reason: A/C power on!!
@@@@@@@@@rDtvCfg.u1Flags[48]@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@=
Org:0x30 Flags:0x30
         cccccccccccccccccc                    
---------test LYQ check eeprom boot-----------
---------boot reason is not watchdog-----------
PDWNC_EnterPowerDown(100,0)
Disable VGA wakeup
Standby                        
PDWNC_MTK_SetupPowerDown breath!!SWITCH_T8032
?vEnterPowerStandby: Cbus_Init
shop finished and standby
------------------------------------------------下边是按开机出的信息-------------------------------------------------
PDWNC_EnterPowerDown(100,0)
Disable VGA wakeup
Standby                        
PDWNC_MTK_SetupPowerDown breath!!SWITCH_T8032
?vEnterPowerStandby: Cbus_Init
shop finished and standby
H匔吤DRAM Channel A Calibration.
1T = (78 - 16) = 62 delay cells
Clock frequency = 798 MHz, Clock period = 1253 ps, 1 delay cell =20 ps
Byte 0 : Gating(-31 ~ 31), Size=63 .
Byte 1 : Gating(-31 ~ 31), Size=63 .
Byte 2 : Gating(-31 ~ 32), Size=64 .
Byte 3 : Gating(-30 ~ 30), Size=61 .
HW Byte 0 : DQS(-9 ~ 14), Size 24 , Set 3.
HW Byte 1 : DQS(-12 ~ 12), Size 25 , Set 0.
HW Byte 2 : DQS(-9 ~ 12), Size 22 , Set 2.
HW Byte 3 : DQS(-11 ~ 13), Size 25 , Set 1.
DATLAT calibration
first_step= 11 total pass= 5 best_step=12 .
TX HW Byte 0 : DQS(2 ~ 26), Size 25, Set 14.
TX HW Byte 1 : DQS(4 ~ 27), Size 24, Set 15.
TX HW Byte 2 : DQS(2 ~ 23), Size 22, Set 13.
TX HW Byte 3 : DQS(2 ~ 25), Size 24, Set 14.
DRAM A Size = 768 Mbytes.
BootStart Pmain0x0000a000
EMMC boot
CID:0xb81762e7
:0x30029155
:0x30344745
:0x11010030
LZHS addr:0x00100040
LZHS size:0x0015c650
LZHS checksum:0x000000d4
LZHS size:0x0015c650
store RSA & AES keys in DMX SRAM
LZHS begin
BootStart Lmain
MT5882 Boot Loader v0.9
SIF_Master0: V2 design
IR DATA register : 0x       0
T8032 change to loader stage...
LDR_FlashCopy 0xf010 0x62b00 0x80
11010030:30344745:30029155:11010030
id1:00303034 id2:47453002
eMMC Name: THGBMBG5D1KBAIL
Support network!1st MAC in EEP is valid (5c:36:b8:c3:1b:d4)
1st : (5c:36:b8:c3:1b:d4)
2nd : (ff:ff:ff:ff:ff:ff)
@@@@@@@@@epp_usbupgrade_flag[0x30]
@@@@@@@@@rDtvCfg.u1Flags[48]@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@=
Org:0x30 Flags:0x30
         cccccccccccccccccc                    
---------test LYQ check eeprom boot-----------
---------boot reason is not watchdog-----------
------[_LdrCheckEepromBoot] power mode = standby,ir or button wakeup---------
PDWNC_Init
Not support [LdrLedBlinkikng]!!

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 楼主| 发表于: 2019-8-30 12:00:42
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忘了说明最重要的事:求 程序
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