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iFix 爱修网»论坛 › 液晶电视机 维修交流 资料下载 › 海信液晶电视维修 › 请教海信LED40K3100刷机问题，打印信息问题。
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请教海信LED40K3100刷机问题，打印信息问题。

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天龙电子
发表于: 2018-6-6 13:56:55
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这台海信的主板是RSAG7.820.6738,去年系统问题刷好了，今年又坏了，刷过之后是一个倒下的机器人，带红色感叹号，用RT809F看打印信息显示没有启用缓存，难道缓存坏了吗？请教各位师傅帮我看一下。
CID:0xb86d53b1
:0x11011dc5
:0x34473261
:0x90014a48
LZHS addr:0x00100040
LZHS size:0x000ba900
LZHS checksum:0x000000ce
LZHS size:0x000ba900
store RSA & AES keys in DMX SRAM---!!!
LZHS begin
Boot
Start Lmain
MT5882 Boot Loader v0.9
Boot reason: A/C power on!!90014a48:34473261:11011dc5:90014a48
id1:4a483447 id2:32611101
eMMC Name: H26M31001HPR
[Loader] SDR50 param 0x800f00 , 0xf000f
[Loader] SDR50 param 0x800f00 , 0xf000f
TEST: EDID from EMMC------------------
SIF_Master0: V2 design
IR DATA register : 0x       0
Boot reason: A/C power on!!T8032 init A/C on case loader stage...
Load T8032 FW (addr: 0x  d8eac0, size: 21849)success!!
T8032 FW version: 1
T8032 change to loader stage...
LDR_FlashCopy 0xf010 0x65300 0x80
Support network!1st MAC in EEP is valid (a8:a6:48:0d:6a:5b)
1st : (a8:a6:48:0d:6a:5b)
2nd : (ff:ff:ff:ff:ff:ff)
Boot reason: A/C power on!!update check AP_Flag =0
-----LDR_IRCheckBtn-----
---Don't have interrupt---
---Don't have interrupt---
---Don't have interrupt---
check IR key no press
Boot reason: A/C power on!!The Power on mode in EEPROM is 1
Org:0x30 Flags:0x30
                             
PDWNC_Init
Boot reason: A/C power on!![ds]TCON_SUPPORT_GAMMA_WP:{hisense/mtk_gpio.h:[767]}partid=18, offset=9141, uTconEnableGammaWP=1
[ds]TCON_VDDA:{drv_tcon.c:[3248]}partid=18, offset=9143, u1TconVdda=0
[ds]:TCON_VDDA:G1572 NWR 202  {hisense/mtk_gpio.h:[845]}
[xq] Hp detect Level 0  1: HP Plug In 0: HP Plug Out
[xq] power on msuic flag : 0x0 ,u1MusicFlag:0 return 0
Hisense backlight value form eeprom is 160
Panel Header values [Flag: 0xfe, PanelDataMode: 0].
DATA_SEPARATE panel_attr[0] oooooooooooook 1920
DATA_SEPARATE panel_attr[1] oooooooooooook 1080
DATA_SEPARATE panel_attr[2] oooooooooooook 153500000
DATA_SEPARATE panel_attr[3] oooooooooooook 148500000
DATA_SEPARATE panel_attr[4] oooooooooooook 148500000
DATA_SEPARATE panel_attr[5] oooooooooooook 120000000
DATA_SEPARATE panel_attr[6] oooooooooooook 2345
DATA_SEPARATE panel_attr[7] oooooooooooook 2200
DATA_SEPARATE panel_attr[8] oooooooooooook 2200
DATA_SEPARATE panel_attr[9] oooooooooooook 2115
DATA_SEPARATE panel_attr[10] oooooooooooook 1480
DATA_SEPARATE panel_attr[11] oooooooooooook 1125
DATA_SEPARATE panel_attr[12] oooooooooooook 1350
DATA_SEPARATE panel_attr[13] oooooooooooook 1115
DATA_SEPARATE panel_attr[14] oooooooooooook 62
DATA_SEPARATE panel_attr[15] oooooooooooook 47
DATA_SEPARATE panel_attr[16] oooooooooooook 30
DATA_SEPARATE panel_attr[17] oooooooooooook 3
DATA_SEPARATE panel_attr[18] oooooooooooook 2064
DATA_SEPARATE panel_attr[19] oooooooooooook 1024
DATA_SEPARATE panel_attr[20] oooooooooooook 72
DATA_SEPARATE panel_attr[21] oooooooooooook 255
DATA_SEPARATE panel_attr[22] oooooooooooook 208
DATA_SEPARATE panel_attr[23] oooooooooooook 160
DATA_SEPARATE panel_attr[24] oooooooooooook 0
DATA_SEPARATE panel_attr[25] oooooooooooook 150
DATA_SEPARATE panel_attr[26] oooooooooooook 150
DATA_SEPARATE panel_attr[27] oooooooooooook 2
DATA_SEPARATE panel_attr[28] oooooooooooook 110
DATA_SEPARATE panel_attr[29] oooooooooooook 15
DATA_SEPARATE panel_attr[30] oooooooooooook 3
DATA_SEPARATE panel_attr[31] oooooooooooook 30
DATA_SEPARATE panel_attr[32] oooooooooooook 0
DATA_SEPARATE panel_attr[33] oooooooooooook 209
Load panel table from Flash success, use separate panel
[ds]lvds_drving4/6:{drv_lvds.c:[467]}partid=18, lvds4offset=9137, lvdsDrv4=1, lvds6offset=9144, lvdsDrv6=0
[SA7] vDDDSInit
[SA7] _fgVopllUseDDDS = True
[LVDS] VOPLL Initialize successful !
[ds]HIS_TCON_GAMMA_OSD:{ostg_if.c:[1947]}partid=18, offset=9142, uTconEnableGamOSD=0
[ds]HIS_TCON_GAMMA_OSD:OS_Option_Pos = 0  {ostg_if.c:[1806]}
vDrvLVDSOn(),  FIFO skew = 0x506
jpeg_decode(0x3581f000, 1048576, 0x3591f000, 1048576, 0x35a1f000, 1920, 1080)
Color:14 BmpAddr:0x35a1f000 Width:1920 Height:1080
[ds]First load drv_Flip/Mirror Enable:{drv_display.c:[3427]}offset=9139, FlipEnable=1,MirrorEnable=1
[ds]drv_Flip/Mirror Enable:{drv_display.c:[3429]}offset=9139, FlipEnable=1,MirrorEnable=1
[ds]drv_Flip/Mirror Enable:{drv_display.c:[3429]}offset=9139, FlipEnable=1,MirrorEnable=1
[OSD]DBG Timing is Front Scaler
[ds]HIS_TCON_GAMMA_OSD:{ostg_if.c:[1947]}partid=18, offset=9142, uTconEnableGamOSD=0
[ds]HIS_TCON_GAMMA_OSD:i4H = 136  {osd_base_if.c:[1215]}
[OSD]i4H=310 i4V=9
u4HaderAddr = 0x34e1f000, u4DisAddr=0x34e20000
Panel 1920 x 1080
*************u4BmpPitch=7680******************
u4SrcWidth=1920 u4Value=0
u4OutWidth=1920,u4OutHeight=1080,u4OutX=0,u4OutY=0.
LDR_OsdDisplay(14, 0x35a1f000, 1920, 1080) return 0
update check AP_Flag =0
-----LDR_IRCheckBtn-----
---Don't have interrupt---
---Don't have interrupt---
---Don't have interrupt---
check IR key no press
Flash load lzhs header from 0x80000 to dram(0x1509950), size=2048
Decompression uboot to 0x01000000...
Flash load image from 0x80000 to dram(0x1509950), size=0x3b9b3
Flash load tz from 0x0(part_15) to dram(0x3ec00000), size=0x42451
LZHS start
LZHS done
LZHS start
LZHS done
Starting image...

U-Boot 2011.12.12 (Sep 20 2016 - 14:32:22)
DRAM:  822.1 MiB
u4DramSize: 0x400
WARNING: Caches not enabled
MMC:   HOST 1
90014A48:34473261:11011DC5:B86D53B1
id1:4A483447 id2:32611101
eMMC Name: H26M31001HPR
[emmc]bus timing switch to HS
[Uboot] SDR50 param 0x800f00 , 0xf000f
[emmc]bus width switch to 8(SDR)
msdc clock driving = 0!
msdc clock driving = 7!
[emmc]bus clock switch to 50000000
msdc clock driving = 0!
msdc clock driving = 23!
: 0
msdcgpiomsdcgpio=208,-1,43,-1,-1,-1,
SIF_Master0: V2 design
========log_onoff_ctrl =====1
0.0.0.0
In:    serial
Out:   serial
Err:   serial
Net:   init MMAC driver
ethernet internal PHY init successful!
priv : 0x00efd628
Mmac:hyAddr=0
Mmac::initialize
Net Initialization Skipped
??
pmisc_msg:
before enter recovery,disable osd1 and osd2
kernel: signature verification is OK
ramdisk: signature verification is OK
## Booting kernel from Legacy Image at 00007fc0 ...
   XIP Kernel Image ... OK
OK
Starting kernel ...
TZ Heap: start=0x3EEE5200, end=0x40000000
TZ dram: start=0x3EE00000, end=0x40000000
Boot-
DRAM Channel A Calibration.

Load panel table from Flash success, use separate panel
[ds]lvds_drving4/6:{drv_lvds.c:[467]}partid=18, lvds4offset=9137, lvdsDrv4=1, lvds6offset=9144, lvdsDrv6=0
[SA7] vDDDSInit
[SA7] _fgVopllUseDDDS = True
[LVDS] VOPLL Initialize successful !
[ds]HIS_TCON_GAMMA_OSD:{ostg_if.c:[1947]}partid=18, offset=9142, uTconEnableGamOSD=0
[ds]HIS_TCON_GAMMA_OSD:OS_Option_Pos = 0  {ostg_if.c:[1806]}
vDrvLVDSOn(),  FIFO skew = 0x506
jpeg_decode(0x3581f000, 1048576, 0x3591f000, 1048576, 0x35a1f000, 1920, 1080)
Color:14 BmpAddr:0x35a1f000 Width:1920 Height:1080
[ds]First load drv_Flip/Mirror Enable:{drv_display.c:[3427]}offset=9139, FlipEnable=1,MirrorEnable=1
[ds]drv_Flip/Mirror Enable:{drv_display.c:[3429]}offset=9139, FlipEnable=1,MirrorEnable=1
[ds]drv_Flip/Mirror Enable:{drv_display.c:[3429]}offset=9139, FlipEnable=1,MirrorEnable=1
[OSD]DBG Timing is Front Scaler
[ds]HIS_TCON_GAMMA_OSD:{ostg_if.c:[1947]}partid=18, offset=9142, uTconEnableGamOSD=0
[ds]HIS_TCON_GAMMA_OSD:i4H = 136  {osd_base_if.c:[1215]}
[OSD]i4H=310 i4V=9
u4HaderAddr = 0x34e1f000, u4DisAddr=0x34e20000
Panel 1920 x 1080
*************u4BmpPitch=7680******************
u4SrcWidth=1920 u4Value=0
u4OutWidth=1920,u4OutHeight=1080,u4OutX=0,u4OutY=0.
LDR_OsdDisplay(14, 0x35a1f000, 1920, 1080) return 0
update check AP_Flag =0
-----LDR_IRCheckBtn-----
---Don't have interrupt---
---Don't have interrupt---
---Don't have interrupt---
check IR key no press
Flash load lzhs header from 0x80000 to dram(0x1509950), size=2048
Decompression uboot to 0x01000000...
Flash load image from 0x80000 to dram(0x1509950), size=0x3b9b3
Flash load tz from 0x0(part_15) to dram(0x3ec00000), size=0x42451
LZHS start
LZHS done
LZHS start
LZHS done
Starting image...

U-Boot 2011.12.12 (Sep 20 2016 - 14:32:22)
DRAM:  822.1 MiB
u4DramSize: 0x400
WARNING: Caches not enabled
MMC:   HOST 1
90014A48:34473261:11011DC5:B86D53B1
id1:4A483447 id2:32611101
eMMC Name: H26M31001HPR
[emmc]bus timing switch to HS
[Uboot] SDR50 param 0x800f00 , 0xf000f
[emmc]bus width switch to 8(SDR)
msdc clock driving = 0!
msdc clock driving = 7!
[emmc]bus clock switch to 50000000
msdc clock driving = 0!
msdc clock driving = 23!
: 0
msdcgpiomsdcgpio=208,-1,43,-1,-1,-1,
SIF_Master0: V2 design
========log_onoff_ctrl =====1
0.0.0.0
In:    serial
Out:   serial
Err:   serial
Net:   init MMAC driver
ethernet internal PHY init successful!
priv : 0x00efd628
Mmac:hyAddr=0
Mmac::initialize
Net Initialization Skipped
??
pmisc_msg:
before enter recovery,disable osd1 and osd2
kernel: signature verification is OK
ramdisk: signature verification is OK
## Booting kernel from Legacy Image at 00007fc0 ...
   XIP Kernel Image ... OK
OK

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天龙电子
 楼主| 发表于: 2018-6-7 13:45:12
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板主，请您帮帮忙啊！
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ahsztiancl
发表于: 2018-6-11 13:48:00
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这个看不懂 ，楼主修好了记得分享一下维修结果 。大家学习方便...
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