The new chips came and I was able to make some tests.
Seems it was to early for effort...
As the nearest chip in the list of supported devices was TC58NVG3S0FTA00@TSOP48 and I used it, I did not took in mind that 3S0 is 8Gb capacity and the TH58NVG4S0FTAK0@TSOP48 is 16Gb but in 2 "banks" X 8Gb, like a separate chips - Chip A with Chip enable command CE1 and Chip B with CE2.
Now, as capacity I gave is correct = 16Gb the programmer reads two times the Chip A content and respectively writes only in Chip A.
So, I really need help with this.
Can someone push me in right direction, please!
Regards! |